Rigoron

AI Reshaping Chip Design Productivity: RigorAI System Unveiled by RigorEDA

2026-06-16

In recent years, the complexity and cost of chip design have grown exponentially. SoC design workflows involve dozens of EDA tools and hundreds of engineering procedures, while chip performance metrics are required to keep improving and time-to-market cycles are continuously shortened. Against this backdrop, the conventional design paradigm reliant on manual tuning and tool-centric methodologies is hitting efficiency bottlenecks.

Recently, RigorEDA, an EDA vendor specializing in digital circuit design and optimization, officially launched RigorAI, its AI-native chip design system. Integrating large language model technologies, agent frameworks and automated workflows, the system establishes a new-generation AI-driven chip design platform that delivers substantial gains in design efficiency and engineering productivity.

At the start of the new year, the concept of AI-automated chip design has garnered intense global attention. Recursive, a U.S.-based startup, secured a valuation of $4 billion merely two months after its founding, a clear indicator of the industry’s immense optimism for this track.

Nevertheless, RigorEDA began its strategic layout three years ago centering on chip workflow automation, as well as chip data analysis, extraction and management. The company has successively rolled out products including the RigorFlow workflow management platform and the Rigor suite of signoff analysis tools. These offerings have laid a solid foundation for the integration of AI capabilities, and have long been deployed at multiple enterprises with overwhelmingly positive customer feedback.

Dr. Lin Yizhou, CEO of RigorEDA, commented:

“The process tools and data infrastructure we developed in the early stages serve as the data fuel powering our AI capabilities. Initially, we built them to support deep learning-based AI. The explosive advancement of LLM technologies over the past two years has aligned our product roadmap perfectly with the evolution of AI. This outcome stems from both forward-looking planning and a stroke of serendipity. Built upon our years of product development, the RigorAI system is engineered to act as a ‘super assistant’ for chip companies, delivering decision support and automation across every stage of the design flow.”

The RigorAI system consists of three core modules: the Workflow Platform, the Agent & Knowledge Base Platform, and the Chip Data Database Platform.

As an emerging technology, agents still suffer from significant deficiencies in security, stability and controllability. The widely popular OpenClaw has exposed numerous hidden risks in practical use. By contrast, RigorAI was architected from the ground up specifically for chip design enterprises, with full consideration given to data security, access permission governance and system reliability.

The system supports enterprise-grade on-premises private deployment and incorporates comprehensive security control frameworks, empowering semiconductor firms to safely harness AI-driven productivity.

If large language models serve as the "brain" of chip design, automated workflows act as the "hands" that execute tasks. The RigorAI workflow system can autonomously schedule EDA tools, run design flows, and generate analytical results, freeing engineers from frequent script revisions and manual task administration. Enabled by automated, visual flow orchestration, a single engineer can oversee dozens of design flows simultaneously — a stark improvement from the previous limit of merely two to three, delivering substantial efficiency gains.

The Agent Platform not only delivers a suite of specialized intelligent agents, including PR optimization agents, FP agents and DRC fixing agents, but also empowers enterprise users to independently build multi-agent collaboration frameworks tailored to their unique requirements, enabling AI to autonomously handle complex design tasks.

The platform also builds an expert knowledge base of EDA tools for engineers. It delivers hallucination-free professional responses to chip design queries, and automatically constructs an enterprise-grade private knowledge base that evolves continuously. This drastically cuts down the time engineers spend manually reviewing documents and troubleshooting design issues.

Data serves as the core foundation for both management decision-making and AI-driven operations. RigorDB is an intelligent database system tailored for chip design workflows. It centrally manages hierarchical chip data, versions, workflow logs and other related assets, and equips project managers with a suite of natural language query capabilities including automated data extraction, multi-dimensional analysis, and visual chart presentation, delivering flexible data support for informed decision-making.

The RigorAI system is deeply integrated into China’s domestic semiconductor ecosystem. It not only serves numerous domestic chip design enterprises, but also maintains close ties with the domestic ecosystem in its underlying architecture, forming an open platform. The system delivers performance optimization through compatibility with domestic GPUs, and actively supports the integration and invocation of homegrown EDA tools, making it an integral component of the self-reliant and controllable chip industry ecosystem.